SCALE-RT supports National Instruments® FPGA cards for extensive I/O.
For programming purposes the 'SCALE-RT binary utility' is provided for the user.
This allows the creation of binary files from LabVIEW® FPGA VIs (*.lvbit) in a user-friendly way.
The FPGA library blocks in the modeling environment are used to access to the controls and indicators of the NI FPGA card VI.
The data flow for both read and write is shown below.
Note: Boolean types for indicators and controls (e.g. switches and LEDs) are not allowed in combination with SCALE-RT.
The controls and indicators are connected to the MATLAB®/Simulink® library blocks via their names.
The name to address resolution is based on the fpga_io.h header file, which is automatically created from the *.lvbit file with the 'SCALE-RT binary utility':
To select a *.lvbit file browse to the location of the file in the tree view, use your mouse to drag and drop it into a 'Bitfile Comedi' field.
The fpga_io.h header file will be created in the 'Model Directory'.
Work Directory
This folder is optional for fpga_io.h and *.bin files creation. It is required to store the *.txt-files.
A copy of fpga_io.h and *.bin -files will be stored in this folder if the path is valid.
Model Directory
This is the folder where the model file (e.g.: *.mdl) is located.
The fpga_io.h header files will be stored in this folder.
The local fpga_io.h will be used for real-time code generation.
Target Configuration
Drag a *.lvbit- File from the tree control and drop it to the appropriate 'Comedi' slot.
Device
The target device for which the binary file will be created.
Create *.bin
Binary-stream will be extracted from the selected *.lvbit files and will be stored in a binary file (*.bin ) in the same folder.
This binary file can be loaded and executed on a FPGA card. The filename depends on the comedi slot and the device type.
The Hardware Configuration page of the SCALE-RT Webinterface can be used to check the device and the comedi configuration.
With the 'Copy to Target' function the binary files will be copied into the upload folder on the target.
Create *.h
The fpga_io.h header file contains information (name, register address and data type)
of the FPGA VI's controls and indicators. This information is used by the SCALE-RT FPGA Simulink blocks.
The name of a control or indicator is resolved to a address via the FPGA_IO struct stored in the fpga_io.h file.
Open *.h
An existing configuration will be loaded, by opening a fpga_io.h header file.
Create *.txt
The text file (*.txt) contains information (name, register address and data type)
of the FPGA VI's controls and indicators.
Copy to Target
Copy the previously generated binary files (*.bin) to the real-time target.
The driver interface or has to be restarted after the binary files where copied to the real-time target.
Note: After the binary files have been copied to the target, the driver interface must be restarted.
The SCALE-RT Suite can be used to restart the driver interface (see Advanced Functions of SCALE-RT Suite)