Normally the total system is modeled. This implies that a closed loop will be created. The model must be capable of running. If the first iteration of the system architecture is tested, the system model will be split at the interfaces of the test bench.
The following figure illustrates the model of a closed loop control. The controlled system is simulated by a transfer function.
Simulation model of the whole system
Information on the generation of models is included in the MATLAB®/Simulink® documentation.